Dr. Alok Kumar Kamal is an assistant professor of Electrical and Electronics Engineering at the Atal Bihari Vajpayee - Indian Institute of Information Technology & Management Gwalior. He received his master’s in VLSI design from NIT Hamirpur, Himachal Pradesh in 2013 and his Ph.D. from Indian Institute of Technology Patna, in the area of emerging MOS transistors for neuromorphic applications in 2022. Presently he is exploring, device-circuit co-simulation design for the development of Spiking Neural Networks (SNN). He has published his works in IEEE Transactions (TED, TNANO) and other SCI listed journals.

Experience:

Teaching Interests: 1) Solid state devices

                                2) Analog electronics

                                3) VLSI Design

                                4) VLSI Technology

Research Interests: 1) Semiconductor device physics

                                2) Design, simulation and modelling of semiconductor devices

                                3) Capacitorless memory

                                4) Device based artificial neuron/synapse

                                5) Neuromorphic hardware

Member of Professional bodies:

• IEEE Circuits and Systems Society
• IEEE Electron Device Society
• IEEE Member
• IEEE Electronic Packaging Society

List of Publications:

Patent:

1. Abhash Kumar, Bharat Gupta, Jawar Singh, and Alok Kumar Kamal, “An Ultra-Low Energy Charge Trapping Transistor Device with Neuro-Inspired Learning Capabilities,” India Patent No. 542768 [Granted]

Journals:

1. A. K. Kamal, N. Kamal, and J. Singh, “A low power L-shaped gate bipolar impact ionization MOSFET based capacitorless one transistor dynamic random access memory cell”, Japanese Journal of Applied Physics 185301 (2021).
2. A. K. Kamal, and J. Singh, “Fully Planar Impact Ionization (I²)-RAM Cell With High- Performance and Non-destructive Readout”, IEEE Transactions on Electron Devices, vol. 68, No. 9, pp. 4350-4355, (2021).
3. A. K. Kamal, and J. Singh, “Simulation-Based Ultralow Energy and High-Speed LIF Neuron Using Silicon Bipolar Impact Ionization MOSFET for Spiking Neural Networks”, IEEE Transactions on Electron Devices, vol. 67, No. 6, pp. 2600-2606, (2020).
4. N. Kamal, A. K. Kamal and J. Singh, “L-Shaped Tunnel Field-Effect Transistor-Based 1T DRAM With Improved Read Current Ratio, Retention Time, and Sense Margin”, IEEE Transactions on Electron Devices, vol. 68, No. 6, pp. 2705-2711, (2021).
5. A. K. Kamal, A. Thakur and J. Singh, “Emulating Switching from Short-Term to Long-Term Plasticity of Bio-Synapse using Split Gate MOSFET”, IEEE Transactions on Nanotechnology, vol. 21,pp. 449-454, (2022).
6. A. Kumar, A. K. Kamal, J. Singh and B. Gupta, "Ultra Low Energy Charge Trapping MOSFET with Neuro-Inspired Learning Capabilities," in IEEE Transactions on Nanotechnology, doi: 10.1109/TNANO.2023.3283987.
7. A. Lahgere, A. K. Kamal and R. Kumar, "Band-to-Band Tunneling based Unified RAM (URAM) for Low Power Embedded Applications," in IEEE Transactions on Nanotechnology, doi: 10.1109/TNANO.2024.3436014.

Conferences:

1. A. K. Kamal, N. Kamal and A. Lahgere, "Scalability Prespective of Nanotube TFET Capacitorless DRAM in Sub-20 nm Regime," Proc. Int. IEEE Latin American Electron Devices Conference (LAEDC), Guatemala City, Guatemala, May 2024, pp. 1-4.

2.  L. Ahire, A. Shah, K. Lakshya and A. K. Kamal, "Kernel Prediction based Blind Motion Deblurring," Proc. Int. 2nd IEEE International Conference on Interdisciplinary Approaches in Technology and Management for Social Innovation (IATMSI), Gwalior, India, March 2024, pp. 1-6.

3.  R. Maheshwari, K. Pathak and A. K. Kamal, "Context Aware CNN approach to denoise Salt and Pepper Images," Proc. Int. 2nd IEEE International Conference on Interdisciplinary Approaches in Technology and Management for Social Innovation (IATMSI), Gwalior, India, March 2024, pp. 1-6.

4. A. Kumar, A. K. Kamal, J. Singh and B. Gupta, "Fully Depleted MOSFET Based Bio-Plausible Synapse for Ultra-Low Energy Applications," 2023 27th International Conference Electronics, Palanga, Lithuania, 2023, pp. 1-5, doi: 10.1109/IEEECONF58372.2023.10177580.